VHDL Miscellaneous Questions

Describe the Skeleton of a Basic VHDL Program ?

The VHDL program contains Entity, Architecture , Configuration
and library.

The declaration part is optional and can include internal signal declarations or constant
declarations
There are many possibilities for concurrent_stmts, which we will cover soon
Other design units (beyond entity and architecture) include
• Package declaration & body
A package is a collection of commonly used items, such as data types, subprograms
and components
• Configuration
An entity declaration can be associated with multiple architecture bodies
A configuration enables one of them to be instantiated during synthesis
A VHDL library is a place to store design units
The default library is ’work


What are VHDL Objects ?

An object is a named element that holds a value of specific data type.
There are four kinds of objects :-

• Signal
• Variable
• Constant
• File (cannot be synthesized)

What are the various liabraries used in VHDL Programming ?

Library ieee;

Use ieee.std_logic_1164.all;

Use ieee.std_logic_arith.all;

Use ieee.std_logic_signed.all;

Use ieee.std_logic_unsigned.all;

What ar the Various data types used in VHDL ?

bit values: '0', '1'

boolean values: TRUE, FALSE

integer values: -(231) to +(231 - 1)

Std_logic values: 'U','X','1','0','Z','W','H','L','-'

'U' = uninitialized

'X' = unknown

'W' = weak 'X‘

'Z' = floating

'H'/'L' = weak '1'/'0‘

'-' = don't care

Std_logic_vector (n downto 0);

Std_logic_vector (0 upto n);

What do you mean by RTL ?

RTL consists of a language which describes behavior in -

1.asynchronous and synchronous state machines

2.data paths

3.operators (+,*,<,>,...)

4.registers

Explain Architecture declaration region ?

The architecture declaration part must be defined before first begin
and can consist of, for example:

1.types

2.subprograms

3.components

4.signal declarations

Few Other Basic Concepts of VHDL :-

1. We can use the same signal names, the formals: Sum , X , Y , and Cout, in the architecture as we use in the entity
2. An architecture can refer to other entity-architecture pairs (i.e., we can nest black boxes)
3. Input port can only be read inside architecture

4. Functions and procedures are important parts of the language in order to handle complexity
5. Inout is used for Component read or write to the signal (bidirectional signals)
6. Output port can only be written inside architecture

7. Multiple signal assignment statements are executed concurrently in simulated time